New IC capabilities with Power Gold. To shorten time to market, to reduce test costs, to overcome packaging problems and to introduce reliable products that exceed expectations.
|50um diameter wires parallel bonded to Power Gold pads over output transistors to minimize on resistance. Conversion from flip-chip design to a ball bonded power IC.|
Gold is expensive but Power Gold lines and pads use less gold than the gold wires to bond out ICs. Gold bumping is used by CMOS LCD driver ICs, in low cost consumer products as MP3 and cell-phones. Power Gold lowers packaging and test costs.
Fine-pitch ball bonds
|20um wires bonded at 54um pad pitches|
Power Gold pads are 10% stronger ball shear plus more ductile than to aluminum pads ball shear + pull data. Without the aluminum oxide, less US power required. Can achieve finer pad pitches using smaller free air ball diameter.
175°C Tj-max package reliability
|Power max = (T j-max - T a ) / θ ja|
Operating ICs hotter increases power dissipation. A diffusion barrier slows gold diffusion into aluminum Kirkendall voiding, purple plague and Au/Al brittle intermetallic failure slows. Power Gold bond pads are 6x to 100x longer lifespan compared against standard aluminum pads.
Integrated gold inductors
|Gold Inductor with permalloy or ferrite core. See larger photo|
Tiny gold inductors integrated directly on top of IC. Matching magnetic material to switching frequency, high Q inductors from 10nH up to 2uH are achieved. Wire loops plus magnetic core fit within 1mm thin over molded plastic packaging.
Chip mold lock & survives MSL1 package relibility
|Scanning acoustic images of 100 TQFP packages after temperature cycling and then plus autoclave. ICs protected by Power Gold still function even with package mold compound delamination around IC chip!|
On-chip mold lock against mold compound delamination from chip surface. With corrosion protection from Power Gold; although package delminates at copper flag heat sink, Si chips function even after been subjected to MSL1 + 1000AATC(-65°C to 150°C) + autoclave.
|T failure = B 0 exp[(-a)RH] f(V) exp[Ea/kT]|
|(-a)RH - humidity effect||E a - for A1 corrosion; 0.75eV|
|f(V) - voltage effect||k = 8.62E - 5eV / °K|
Gold is the most noble metal and does not corrode like aluminum. Time to failure of aluminum pads shortens 3x as the IC operating temperature rises 25°C from 150°C to 175°C Tj-max. Hurdle for both today's and future packages.
Bond over active circuits (BOA)
|Secondary gold bonds to Power Gold pads directly over IC. FIB shows undamaged active circuits underneath.|
Power Gold pads are thick and soft to cushion against bond forces plus package shear stress. Passivation, oxide ILDs, and MOS circuits remain undamaged underneath secondary gold bonds.
Wafer level burn-in (WLBI)
|Crossectional drawing of Power Gold pads for pogo pins wafer probing|
Thick Power Gold pads afford pogo pins with milligram probe forces directly on active circuits. Strategy towards burn-in of automotive ICs on whole Power Gold wafers 150°C up to 190°C.
Integrated gold transformer
|Primary plus secondary coils around magnetic core can be designed to become gold transformer.|
Noise isolation or voltage transformers can be integrated directly over ICs. Tested to 100V. Gold wire loop height less than 250 microns.
Ferrite or permalloy magnetic cores
|Circular ferrite core|
Processes redeveloped to supply custom ferrite cores of different shapes down to 0.125mm thickness and at less than 1mm dimensions for integration over ICs or over IPDs. Ancient magnetic core memory technology resurrected for future advance ICs!
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